Volume 8 Issue 4-1 - August 2017

  • 1. High speed finite impulse response filter for low power devices

    Authors : Birinderjit Singh Kalyan

    Pages : 120-124

    DOI : http://dx.doi.org/10.21172/1.841.21

    Keywords : component; formatting; style; styling; insert

    Abstract :

    The advancement in the field of CMOS technology has motivated the research to implement more and more complicated signal processing systems on a VLSI chip. The basic requirements of these signal processing units are to consume less power and have more functionality. The chip area, speed and power consumption are considered to be the criteria for evaluating the quality of the system. The increase in functionality, operating frequency and long battery life has made the low power portable electronic devices pragmatic in the recent years. The reduction in power consumption of a system, increases its battery life. In most of the signal processing algorithms, multiplication operation dominates other operations. The low power high performance multiplier plays a vital role in high performance Digital Signal Processing (DSP) systems developed using Multiply and Accumulator (MAC) unit and Finite Impulse Response (FIR) filter. Hence the designing of a low power multiplier becomes an important part in low power VLSI system design. In the recent years, the consideration of multiplier design has been focused to enhance its speed and throughput rate which are expected to affect the performance of the digital signal processing systems.

    Citing this Journal Article :

    Birinderjit Singh Kalyan, "High speed finite impulse response filter for low power devices", https://www.ijltet.org/journal_details.php?id=920&j_id=3930, Volume 8 Issue 4-1 - August 2017, 120-124, #ijltetorg