Volume 8 Issue 1 - January 2017

  • 1. Design of viterbi decoder using hybrid register exchange method for low power applications

    Authors : Surekha K. Tadse, S. L. Haridas

    Pages : 366-371

    DOI : http://dx.doi.org/10.21172/1.81.047

    Keywords : Viterbi decoder Traceback REM HREM

    Abstract :

    Abstract- With increasing demand of wireless multimedia business, it is necessary to call for strict criterion on speed and power consumption of portable devices. Viterbi Decoder serves as an important role in error correction of communication devices.Significant power reduction can be achieved by modifying the design and implementation of viterbi decoder. In this paper we proposed the methods for survivor path storage and decoding as traceback (TB) and register exchange method (REM).REM cosumes large power and area, due to huge switching activity.The problem of switching activity of Viterbi decoder can be reduced by combining TB and REM and the method called Hybrid Register Exchange Method (HREM).The Viterbi decoder is designed using REM, HREM and simulated on Xilinx tool and power is calculated on Xilinx power analyser. As the switching activity is reduced in HREM the viterbi decoder achieves reduction in power in HREM as compared with REM.

    Citing this Journal Article :

    Surekha K. Tadse, S. L. Haridas, "Design of viterbi decoder using hybrid register exchange method for low power applications", https://www.ijltet.org/journal_details.php?id=910&j_id=3602, Volume 8 Issue 1 - January 2017, 366-371, #ijltetorg