1. A new high speed low power performance of 8- bit parallel multiplier-accumulator using modified radix-2 booth encoded algorithm
Authors : V.sandeep Kumar, V.swathi
Citing this Journal Article :
V.sandeep Kumar, V.swathi, "A new high speed low power performance of 8- bit parallel multiplier-accumulator using modified radix-2 booth encoded algorithm", Volume 2 Issue 3 - May 2013,
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